Physical Design Guided Training

This portal is exclusive for Mirafra internal training                 

Our Guided trainings are under development hence we are also using this portal as collection of different training recourses.                                
    Kindly share your feedback and any good training material which can help us in improving our trainings                                        

Physical Design Prerequisite

This course is for freshers. It explains Unix, Editor and basic PD flow. New joiner at Mirafra can learn how to access Mirafra tools using Putty and VPN   

3 Courses

Power Management

In this course you will learn various aspects of power management in chip design. It covers power distribution network (PDN), IR drop Analysis, Low Power and Conformal low power (CLP)

3 Courses

Physical Design Basics

This course covers entire PD for freshers. It includes Synthesis, Constraints, Unified Power Format (UPF), Floorplan, Power plan, Placement, CTS, Route, STA, Physical Verification, Logic Equivalence Check (LEC), Signal Integrity & Noise

12 Courses

Scripting And CAD

This module includes training on languages like Perl and TcL. It also includes CAD and Regexp

4 Courses

Advance Topics

This course is designed for learner with understanding of PD basics.

  • Synthesis Deep Dive
  • STA Deep Dive
  • Design For Test (DFT)
  • Optimization techniques
  • Tech Library
  • Package: RDL routing, Bumps, IO
  • Full chip – Partitioning, Time budgeting, ILM etc
  • PPA
  • Architecture based



Tools and Labs

This courses will give basic to advance level understanding of tools used and reporting.

  • ICC Deepdive
  • Innovus Deepdive
  • Fusion Deepdive
  • Primetime Deepdive
  • Reports – Timing, Qor, Clock

Happy Learning!!

Get in touch for any query